Fault Tolerant Design for Large Scale Matrix Multiplier Based on Reconfigurable Architecture
碩士 === 國立臺灣大學 === 電機工程學研究所 === 99 === Matrix multiplication is a fundamental and important operation in many research and engineering problems. Enhancing matrix multiplication parallelism in a 2-dimensional PE (processing element) array is a popular approach to improve the computation efficiency. Ho...
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/25769095530882395675 |