A Low-Cost Self-Test Structure for SoC Interconnect Crosstalk Faults

A Low-Cost Self-Test Structure for SoC Interconnect Crosstalk Faults

碩士 === 元智大學 === 資訊工程學系 === 91 === With the improvement of process technologies, the spacing between interconnects is getting shorter. The influence of cross-coupling capacitance between adjacent wires becomes serious. The increase of cross-coupling result in crosstalk effects, which are m...

Full description

Bibliographic Details
Main Author:	簡才富
Other Authors:	曾王道
Format:	Others
Language:	zh-TW
Published:	2003
Online Access:	http://ndltd.ncl.edu.tw/handle/06230836482098523125

Similar Items

Design of Access Wrapper for At-speed Test of Crosstalk Faults in SOC Interconnects
by: Deng-Yun Gan, et al.
Published: (2003)

On Interconnect Verification and Diagnosis for SoC
by: Chun-Yao Wang, et al.
Published: (2002)

Pseudo-Exhaustive Built-in Self-Testing for Signal Integrity of High-Speed SoC Interconnects
by: Liu, Jianxun
Published: (2011)

A theory on repeater-insertion methodologies for SoC interconnects
by: Awwad, Falah Rashad
Published: (2006)

Low-Cost Test Methodologies for Modern SoC/SiP Designs
by: Lin, Chia-Yi, et al.
Published: (2010)

Nanometer Interconnect Test Structure Generation Software for Comprehensive Process Variation Modeling for SoC Designs
by: Hung-Chih Li, et al.
Published: (2005)

A Low-Cost SoC for Information Appliance Networking
by: Zhao-Jung Chen, et al.
Published: (2002)

SoC interconnect architecture design and evaluation under timing constraints
by: Grecu, Cristian
Published: (2009)

Networks on Chip : emerging interconnect infrastructures for MP-SoC platforms
by: Pande, Partha Pratim
Published: (2009)

SoC interconnect architecture design and evaluation under timing constraints
by: Grecu, Cristian
Published: (2009)

Arbitration Techniques for SoC Bus Interconnect with Optimized Verification Methodology
by: Sarpangala, Kishan
Published: (2013)

Full-Chip Crosstalk-Driven Gridless Routing on SoC Physical Integration
by: Chun-Tasi Huang, et al.
Published: (2003)

SoC Test Scheduling using Simulated Annealing Algorithm
by: Chen-Fu Huang, et al.
Published: (2004)

ATE Testing for LTE SoC
by: LIN,YU-TIEN, et al.
Published: (2013)

Interconnection Optimization Global Routing with Available Buffer Region on SoC Design
by: Chung-Chi Lin, et al.
Published: (2002)

The Study of Electrical Characteristic and Fault Model for SoC Package
by: I-Chih Wu, et al.
Published: (2004)

Optimization of Built-In Self Test Circuitry for the SoC Embedded Cores
by: Kristem, Sravani
Published: (2011)

A Bandwidth Control Arbitration for SoC Interconnections Performing Applications With Task Dependencies
by: Salvador Ibarra-Delgado, et al.
Published: (2020-11-01)

Interconnect-Centric Oscillation Ring Architectures and Algorithms for SoC Testability and Yield Enhancement
by: Katherine Shu-Min Li, et al.
Published: (2005)

Socket-based Software and Hardware performance co-monitoring in AXI interconnect SoC
by: Ting-Hsuan Wu, et al.
Published: (2014)

SoC Integration and Verification of a 3D Graphics SoC
by: Tzu-Ming Huang, et al.
Published: (2011)

SoC-Level Fault Injection Methodology in SystemC Design Platform
by: Wang, Yi-Chiang, et al.
Published: (2009)

Analysis of high performance interconnect in SoC with distributed switches and multiple issue bus protocols
by: Narayanasetty, Bhargavi
Published: (2011)

Cost Model-Driven Test Resource Partitioning for SoCs
by: Wuertemberger, Armin, et al.
Published: (2006)

Java SoC Self-booting Circuit Design
by: Lin, Cheng-Ju, et al.
Published: (2016)

Low Power Cache for SoC Processor Design
by: Yen-Jen Chang, et al.
Published: (2003)

A Fault-tolerant Strategy for Embedded-memory SoC OFDM Receivers
by: Smolyakov, Vadim
Published: (2012)

A Fault-tolerant Strategy for Embedded-memory SoC OFDM Receivers
by: Smolyakov, Vadim
Published: (2012)

Achieving Fault-Tolerant NUCA for Multi-Core SoC by Remapping Mechanisms
by: Chen-yu Chen, et al.
Published: (2011)

Evaluation of Cryptographic Algorithms over an all Programmable SoC (AP SoC) Device
by: Iván Gutiérrez Agramont, et al.
Published: (2017-04-01)

An SoC Design Framework Integrating SDRAM Controller, SIPs, and SoC Bus Analyzer
by: Chun-Ching Wu, et al.
Published: (2009)

Analysis of Taiwan SoC Industry Strategic Factors
by: Chien Yin-Shan, et al.

Oscillation Ring Test for Interconnects in SOC Environment
by: Bor-Song Liu, et al.
Published: (2001)

Self-healing RF SoCs: low cost built-in test and control driven simultaneous tuning of multiple performance metrics
by: Natarajan, Vishwanath
Published: (2011)

Analysis and research of microcontroller's structure in SoC
by: Lee yun-chen, et al.
Published: (2002)

On Chip Memory Designs for Ultra-Low-Voltage SoC
by: Pei-Yao Chang, et al.
Published: (2013)

Design Techniques for Low Voltage and High Performance SoC
by: Ching-Hua Lin, et al.
Published: (2009)

Implementation of Narrowband IoT SoC ATE Testing Technique
by: CHEN, WEI-FENG, et al.
Published: (2019)

An IEEE 1500 Compatible Test Wrapper for SoC Debug
by: Jheng-Yang Ciou, et al.
Published: (2010)

Low-cost, low-power, one-point-calibrated all-digital temperature sensor for SoC applications
by: Tzu-Yuan Kuo, et al.
Published: (2010)

Cannot write session to /tmp/vufind_sessions/sess_festmjo7f3guqtn97o7rnla9f1