Low cost concurrent error detection strategy for the control logic of high performance microprocessor RAS improvement
We propose a low cost concurrent error detection strategy to improve the Reliability, Availability, Serviceability (RAS) of high performance microprocessors, by specifically targeting one of its most critical blocks (from the point of view of the microprocessor RAS), that is the control logic. By di...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
2013-03-07.
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| Subjects: | |
| Online Access: | Get fulltext |