Addressing Useless Test Data in Core-Based System-on-a-Chip Test
This paper analyzes the test memory requirements for core-based systems-on-a-chips and identifies useless test data as one of the contributors to the total amount of test data. The useless test data comprises the padding bits necessary to compensate for the difference between the lengths of differen...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
2003-11.
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| Subjects: | |
| Online Access: | Get fulltext |