An area efficient memory-less ROM design architecture for direct digital frequency synthesizer
This paper introduces a new technique of designing a read-only memory (ROM) circuit, namely; memory-less ROM as a novel approach to designing the ROM lookup table (LUT) circuit for use in a direct digital frequency synthesizer (DDFS). The proposed DDFS design uses the pipelined phase accumulator (PA...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Institute of Advanced Engineering and Science
2021
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| Series: | International Journal of Electrical and Computer Engineering
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| Subjects: | |
| Online Access: | View Fulltext in Publisher View in Scopus |