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Idros, F.
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Idros, F.
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1
An area efficient memory-less ROM design architecture for direct digital frequency synthesizer
by
Ali, S.H
,
Alkurwy, S.
,
Idros
,
F
.
,
Islam, M.S
Published 2021
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2
A low power memoryless ROM design architecture for a direct digital frequency synthesizer
by
Alkurwy, S.
,
Idros
,
F
.
,
Islam, S.
,
Sawal, A.L.I
Published 2017
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Related Subjects
Angular decomposition
Carry look-ahead adder
Design
Design architecture
Design technique
Direct digital frequency synthesizer
Direct digital frequency synthesizer (DDFS)
Dynamic Power
Frequency synthesizers
Kogge-stone (KG) adder
Memory architecture
Memory-less ROM
Phase accumulator
Phase accumulators
Pipeline stages
ROM
Read only memory (ROM)
Read-only memory
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