Efficient Hardware Design and Implementation of the Voting Scheme-Based Convolution

Due to a point cloud’s sparse nature, a sparse convolution block design is necessary to deal with its particularities. Mechanisms adopted in computer vision have recently explored the advantages of data processing in more energy-efficient hardware, such as the FPGA, as a response to the need to run...

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Bibliographic Details
Main Authors:	Fernandes, D. (Author), Machado, R. (Author), Pereira, P. (Author), Silva, A. (Author), Silva, J. (Author)
Format:	Article
Language:	English
Published:	MDPI 2022
Subjects:	3d object detection model 3D object detection models Computer hardware Convolution Data handling deep learning Deep learning Design and implementations Energy efficiency Energy utilization Field programmable gate arrays (FPGA) Field-programmable gate array field-programmable gate array (FPGA) Hardware design Hardware implementations Integrated circuit design Object detection Point-clouds sparsity Sparsity voting convolution Voting convolution Voting schemes
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View Fulltext in Publisher

Efficient Hardware Design and Implementation of the Voting Scheme-Based Convolution

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