Combinatorial optimization in VLSI physical design
Simulated Annealing is a general purpose combinatorial optimization technique which has been applied to many problems in VLSI design. In essence, simulated annealing is Monte Carlo iterative improvement with the ability to conditionally accept uphill moves. The notion of a cooling schedule is common...
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| Format: | Others |
| Language: | English en |
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2018
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| Online Access: | https://dspace.library.uvic.ca//handle/1828/9608 |