AUTOMATED SYNTHESIS OF VIRTUALBLOCKS FOR INTERFACING SYSTEM UNDER TEST
In this thesis, I/O signal recognizers, called VIRTUALBLOCKS, are synthesized to interface with a SYSTEM UNDER TEST (SUT). Methods for automated synthesis of virtualblocks allow us to simulate environment interfaces with SUT and also perform fault detection on SUT. Such methods must be able to recog...
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| Format: | Others |
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UKnowledge
2004
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| Online Access: | http://uknowledge.uky.edu/gradschool_theses/251 http://uknowledge.uky.edu/cgi/viewcontent.cgi?article=1254&context=gradschool_theses |