A Branch-Directed Data Cache Prefetching Technique for Inorder Processors
The increasing gap between processor and main memory speeds has become a serious bottleneck towards further improvement in system performance. Data prefetching techniques have been proposed to hide the performance impact of such long memory latencies. But most of the currently proposed data prefetch...
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| Format: | Others |
| Language: | en_US |
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2012
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| Online Access: | http://hdl.handle.net/1969.1/ETD-TAMU-2011-12-10287 |