A PLL Design Based on a Standing Wave Resonant Oscillator

A PLL Design Based on a Standing Wave Resonant Oscillator

In this thesis, we present a new continuously variable high frequency standing wave oscillator and demonstrate its use in generating the phase locked clock signal of a digital IC. The ring based standing wave resonant oscillator is implemented with a plurality of wires connected in a mobius configur...

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Bibliographic Details
Main Author: Karkala, Vinay
Other Authors: Khatri, Sunil P.
Format: Others
Language:en_US
Published: 2011
Subjects:
Voltage Controlled Oscillator
VCO
Phase Locked Loop
PLL
Standing Wave Resonant Oscillator
Traveling Wave Resonant Oscillator
Fine Tuning
Coarse Tuning
Transmission line
Parasitic Extraction
Locking Range
Clock distribution
Online Access:http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8546

Internet

http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8546

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