Detecting Tangled Logic Structures in VLSI Netlists

This thesis proposes a new problem of identifying large and tangled logic structures in a synthesized netlist. Large groups of cells that are highly interconnected to each other can often create potential routing hotspots that require special placement constraints. They can also indicate problematic...

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Bibliographic Details
Main Author: Jindal, Tanuj
Other Authors: Hu, Jiang
Format: Others
Language:en_US
Published: 2010
Subjects:
TLS
Online Access:http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8511