Case Studies on Clock Gating and Local Routign for VLSI Clock Mesh
The clock is the important synchronizing element in all synchronous digital systems. The difference in the clock arrival time between sink points is called the clock skew. This uncertainty in arrival times will limit operating frequency and might cause functional errors. Various clock routing techni...
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| Format: | Others |
| Language: | en_US |
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2010
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| Online Access: | http://hdl.handle.net/1969.1/ETD-TAMU-2010-08-8489 |