Voltage and Timing Adaptation for Variation and Aging Tolerance in Nanometer VLSI Circuits
Process variations and circuit aging continue to be main challenges to the power-efficiency of VLSI circuits, as considerable power budget must be allocated at design time to mitigate timing variations. Modern designs incorporate adaptive techniques for variation compensation to reduce the extra pow...
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| Format: | Others |
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2013
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| Online Access: | http://hdl.handle.net/1969.1/148350 |