Implementation of a Design for Testability strategy using the Genesil silicon compiler

Design for Testability (DFT) is receiving major emphasis in the very large scale integration design field due to increasing circuit complexity. The utility of the silicon compiler and its value to a system designer without extensive VLSI design experience is discussed. Two major techniques for DFT,...

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Bibliographic Details
Main Author: Davidson, John Carl.
Other Authors: Loomis, Herschel H., Jr.
Language:en_US
Published: Monterey, California. Naval Postgraduate School 2013
Online Access:http://hdl.handle.net/10945/27087