Implementation of Configurable Fault Tolerant Processor (CFTP) experiments

Implementation of Configurable Fault Tolerant Processor (CFTP) experiments

The Configurable Fault Tolerant Processor (CFTP) team at Naval Postgraduate School (NPS), Monterey, was created to develop, test, and implement reliable computing solutions for the space environment. The CFTP team seeks to design reliable circuits using Field Programmable Gate Arrays (FPGA) to inclu...

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Bibliographic Details
Main Author: Caldwell, Gerald W.
Other Authors: Loomis, Herschel H.
Format: Others
Published: Monterey California. Naval Postgraduate School 2012
Subjects:
Electrical engineering
Computer programs
Software engineering
Online Access:http://hdl.handle.net/10945/2380

Internet

http://hdl.handle.net/10945/2380

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