Automated parameter extraction for Single Flux Quantum integrated circuits with LVS
Thesis (MEng)--Stellenbosch University, 2015. === ENGLISH ABSTRACT: Thorough layout verification of superconductor integrated circuits goes beyond design rule checking and parameter value extraction. The former is used to verify adherence to process design rules, and the latter to determine the elem...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_ZA |
| Published: |
Stellenbosch : Stellenbosch University
2015
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/10019.1/96992 |