Automated parameter extraction for Single Flux Quantum integrated circuits with LVS

Automated parameter extraction for Single Flux Quantum integrated circuits with LVS

Thesis (MEng)--Stellenbosch University, 2015. === ENGLISH ABSTRACT: Thorough layout verification of superconductor integrated circuits goes beyond design rule checking and parameter value extraction. The former is used to verify adherence to process design rules, and the latter to determine the elem...

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Bibliographic Details
Main Author: Roberts, Rebecca Mimi Catherina
Other Authors: Fourie, Coenrad J.
Format: Others
Language:en_ZA
Published: Stellenbosch : Stellenbosch University 2015
Subjects:
Automated parameter extraction
Single flux quantum circuits
Layout versus schematic verification
UCTD
Online Access:http://hdl.handle.net/10019.1/96992

Internet

http://hdl.handle.net/10019.1/96992

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