Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits

Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits

Since the introduction of Complementary-Metal-Oxide-Semiconductor (CMOS) technology, the chip industry has enjoyed many benefits of transistor feature size scaling, including higher speed and device density and improved energy efficiency. However, in the recent years, the IC designers have encounte...

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Bibliographic Details
Main Author: Lechuga Aranda, Jesus Javier
Other Authors: Fariborzi, Hossein
Language:en
Published: 2016
Subjects:
NEMS
Relay
Low power
Verilog-a
Online Access:Lechuga Aranda, J. J. (2016). Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits. KAUST Research Repository. https://doi.org/10.25781/KAUST-678Y8
http://hdl.handle.net/10754/609468

Internet

Lechuga Aranda, J. J. (2016). Back End of Line Nanorelays for Ultra-low Power Monolithic Integrated NEMS-CMOS Circuits. KAUST Research Repository. https://doi.org/10.25781/KAUST-678Y8
http://hdl.handle.net/10754/609468

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