FPGA acceleration of high performance computing communication middleware

FPGA acceleration of high performance computing communication middleware

High-Performance Computing (HPC) necessarily requires computing with a large number of nodes. As computing technology progresses, internode communication becomes an ever more critical performance blocker. The execution time of software communication support is generally critical, often accounting...

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Bibliographic Details
Main Author: Xiong, Qingqing
Other Authors: Herbordt, Martin C.
Language:en_US
Published: 2019
Subjects:
Computer engineering
Communication
Compression
FPGA
HPC
Middleware
MPI
Online Access:https://hdl.handle.net/2144/38211

Internet

https://hdl.handle.net/2144/38211

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