Parametric polyhedral optimisation for high-level synthesis
High-level synthesis (HLS) improves hardware design productivity by using high-level programming languages for design entry. Although various automatic optimisations have been supported in modern HLS tools, manual effort is still required to achieve sufficient hardware acceleration. Loop pipelining...
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Imperial College London
2017
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| Online Access: | https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.762134 |