Design techniques for low-noise, high-speed fractional-N frequency synthesisers

This thesis presents techniques for designing fractional-N synthesisers which achieve both low phase noise and high loop bandwidth simultaneously. The objective is to provide a single-loop synthesiser solution that satisfies the requirements on both the phase noise level and frequency switching spee...

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Bibliographic Details
Main Author: Jiang, D.
Published: University College London (University of London) 2009
Subjects:
Online Access:http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.625197