AN HEURISTIC SEARCH APPROACH TO TEST SEQUENCE GENERATION FOR AHPL (A HARDWARE PROGRAMMING LANGUAGE) DESCRIBED SYNCHRONOUS SEQUENTIAL CIRCUITS

AN HEURISTIC SEARCH APPROACH TO TEST SEQUENCE GENERATION FOR AHPL (A HARDWARE PROGRAMMING LANGUAGE) DESCRIBED SYNCHRONOUS SEQUENTIAL CIRCUITS

Bibliographic Details
Main Author: Belt, John Edward, 1933-
Language:en_US
Published: The University of Arizona. 1973
Subjects:
Digital integrated circuits > Testing.
Logic circuits > Testing.
Electric fault location > Data processing.
AHPL (Computer program language)
Online Access:http://hdl.handle.net/10150/288052

Internet

http://hdl.handle.net/10150/288052

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