THE IMPLEMENTATION OF THE HIERARCHICAL ABSTRACT SIMULATOR ON THE IPSC COMPUTER
The hierarchical abstract simulator is a multicomponent, multilevel discrete event model where each processor communicates with other processors by message passing. A methodology was developed to map the hierarchical abstract simulator onto distributed simulator architectures. The Intel's Perso...
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| Language: | en_US |
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The University of Arizona.
1987
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| Online Access: | http://hdl.handle.net/10150/276519 |