Concurrent detection of transient faults in microprocessors

A large number of errors in digital systems are due to the presence of transient faults. This is especially true of microprocessor-based systems working in a radiation environment that experience transient faults due to single event upsets. These upsets cause a temporary change in the state of the s...

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Main Author: Khan, Mohammad Ziaullah
Other Authors: Electrical Engineering
Format: Others
Language:en_US
Published: Virginia Polytechnic Institute and State University 2015
Subjects:
Online Access:http://hdl.handle.net/10919/54212
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spelling ndltd-VTETD-oai-vtechworks.lib.vt.edu-10919-542122020-12-23T05:32:33Z Concurrent detection of transient faults in microprocessors Khan, Mohammad Ziaullah Electrical Engineering LD5655.V856 1989.K526 Fault location (Engineering) Fault-tolerant computing A large number of errors in digital systems are due to the presence of transient faults. This is especially true of microprocessor-based systems working in a radiation environment that experience transient faults due to single event upsets. These upsets cause a temporary change in the state of the system without any permanent damage. Because of their random and non-recurring nature, transient faults are difficult to detect and isolate, hence they become a source of major concern, especially in critical real-time application areas. Concurrent detection of these errors is necessary for real-time operation. Most existing fault tolerance schemes either use redundancy to mask effects of transient faults or monitor the system for abnormal operations and then perform recovery operation. Although very effective, redundancy schemes incur substantial overhead that makes them unsuitable for small systems. Most monitoring schemes, on the other hand, only detect control flow errors. A new approach called Concurrent Processor Monitoring for on-line detection of transient faults is proposed that attempts to achieve high error coverage with small error detection latency. The concept of the execution profile of an instruction is defined and is used for detecting control flow and execution errors. To implement this scheme, a watchdog processor is designed for monitoring operation of the main processor. The effectiveness of this technique is demonstrated through computer simulations. Ph. D. 2015-07-09T20:43:18Z 2015-07-09T20:43:18Z 1989 Dissertation Text http://hdl.handle.net/10919/54212 en_US OCLC# 20137598 In Copyright http://rightsstatements.org/vocab/InC/1.0/ xii, 191 leaves application/pdf application/pdf Virginia Polytechnic Institute and State University
collection NDLTD
language en_US
format Others
sources NDLTD
topic LD5655.V856 1989.K526
Fault location (Engineering)
Fault-tolerant computing
spellingShingle LD5655.V856 1989.K526
Fault location (Engineering)
Fault-tolerant computing
Khan, Mohammad Ziaullah
Concurrent detection of transient faults in microprocessors
description A large number of errors in digital systems are due to the presence of transient faults. This is especially true of microprocessor-based systems working in a radiation environment that experience transient faults due to single event upsets. These upsets cause a temporary change in the state of the system without any permanent damage. Because of their random and non-recurring nature, transient faults are difficult to detect and isolate, hence they become a source of major concern, especially in critical real-time application areas. Concurrent detection of these errors is necessary for real-time operation. Most existing fault tolerance schemes either use redundancy to mask effects of transient faults or monitor the system for abnormal operations and then perform recovery operation. Although very effective, redundancy schemes incur substantial overhead that makes them unsuitable for small systems. Most monitoring schemes, on the other hand, only detect control flow errors. A new approach called Concurrent Processor Monitoring for on-line detection of transient faults is proposed that attempts to achieve high error coverage with small error detection latency. The concept of the execution profile of an instruction is defined and is used for detecting control flow and execution errors. To implement this scheme, a watchdog processor is designed for monitoring operation of the main processor. The effectiveness of this technique is demonstrated through computer simulations. === Ph. D.
author2 Electrical Engineering
author_facet Electrical Engineering
Khan, Mohammad Ziaullah
author Khan, Mohammad Ziaullah
author_sort Khan, Mohammad Ziaullah
title Concurrent detection of transient faults in microprocessors
title_short Concurrent detection of transient faults in microprocessors
title_full Concurrent detection of transient faults in microprocessors
title_fullStr Concurrent detection of transient faults in microprocessors
title_full_unstemmed Concurrent detection of transient faults in microprocessors
title_sort concurrent detection of transient faults in microprocessors
publisher Virginia Polytechnic Institute and State University
publishDate 2015
url http://hdl.handle.net/10919/54212
work_keys_str_mv AT khanmohammadziaullah concurrentdetectionoftransientfaultsinmicroprocessors
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