A Unifying Interface Abstraction for Accelerated Computing in Sensor Nodes
Hardware-software co-design techniques are very suitable to develop the next generation of sensornet applications, which have high computational demands. By making use of a low power FPGA, the peak computational performance of a sensor node can be improved without significant degradation of the stan...
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/34625 http://scholar.lib.vt.edu/theses/available/etd-08182011-172058/ |