Process-Induced Degradation during the Integration of Pb(Zr/x Ti/1-x)O3 Ferroelectric Capacitors

• Main Author: Lee, June Key
• Other Authors: Materials Science and Engineering
• Format: Others
• Published: Virginia Tech 2014
• Subjects: FRAM; Thin film; PZT
• Online Access: http://hdl.handle.net/10919/29042; http://scholar.lib.vt.edu/theses/available/etd-092099-110827/

Three types of major process-induced damage which hampers the realization of FRAM (ferroelectric random access memory) device are investigated; dry etching induced damage, hydrogen-induced degradation, and stress effect. Since ferroelectric capacitors utilize the movement of body-centered atoms in perovskite structure, Ti or Zr in the case of Pb(Zr/x Ti/1-x)O3 (PZT), the movement can be suppressed or inhibited by many factors such as space charges, defects, chemical reactions, and stress of stacked layers. Unlike conventional silicon processes, the integration of ferroelectric capacitor module requires high density plasma to pattern their shapes because of a low volatility of etched byproducts, therefore the degradation of ferroelectric capacitor performance could occur by the collision of high energetic particles. The damage of PZT thin film due to dry etching process was characterized in terms of the microstructure and electrical properties. The damaged layer seems to be amorphous and the thickness is about 10 nm. The existence of such a layer in Pt/ PZT/Pt ferroelectric capacitor tends to increase the coercive voltage and the leakage current. The damaged layer was not fully reverted to perovskite phase by the thermal annealing, even at PZT formation temperature. For the elimination of this damaged layer, a novel wet cleaning solution was designed. Scanning electron microscopy (SEM) pictures clearly show that treatment with the cleaning solution completely removed the etching damaged layer. With the cleaning solution, a sidewall cleaning process and a surface cleaning process were proposed to eliminate non-ferroelectric phases such as pyrochlore, PbO, and etching damaged layer. After removing the non-ferroelectric phases, ferroelectric properties such as remnant polarization, coercive voltage, and leakage current were remarkably improved. In addition, the wet cleaned ferroelectric capacitors yielded superior endurance against hydrogen-induced damage compared to those of the non-cleaned capacitors. Several parameters such as Zr/Ti compositional ratios, excess amounts of Pb, the domain poling state, and electrode structures (Pt/PZT/Pt and Ir/IrO2/PZT/Pt/IrO2) were investigated in terms of hydrogen-induce degradation. It was found that the hydrogen-induce degradation is enhanced when PZT films have high compositions of Ti and Pb, and can be suppressed by domain poling prior to the hydrogen anneal. From the SIMS analysis and hysteresis loop shifts, it can be concluded that the hydrogen damage occurs mainly at the PZT/electrode interface and results in the development of negative charge buildup. To reduce the hydrogen-induced damage, an electron cyclotron resonance (ECR) oxygen plasma treatment of the Pt/PZT/Pt capacitor was attempted. It was found that oxygen plasma treatment modifies the surface of Pt electrodes. Surface modification alleviates catalytic activity of Pt electrodes, thereby significantly improving ferroelectric properties such as remnant polarization and leakage current. It seems that highly reactive oxygen radicals in ECR plasma play an important role in suppressing the catalytic activity of Pt electrodes. The cause of the blister formation on the PECVD (plasma enhanced chemical vapor deposition) SiO2/Pt/PZT/Pt capacitor was studied by means of annealing in various ambient. The blisters were observed at a temperature of 325°C in an O2 atmosphere, while in a N2 and an Ar atmosphere blisters were not produced even at 500°C. Hydrogen evolution analysis from PECVD SiO2 layer showed a sharp peak near 320°C. The results indicate that the accumulation of water vapor pressure, developed via a chemical reaction between oxygen and hydrogen could be the dominant factor for blister formation in PECVD SiO2/Pt/PZT/Pt capacitors. The effect of stress was investigated with two different interlayer dielectric (ILD) materials, ECR CVD Oxide and PECVD TEOS Oxide (PE-TEOS). Since the stress of PZT capacitor strongly depends on the ILD deposition temperature, the PZT capacitor with PE-TEOS showed more compressive stress than that with ECR oxide, which results in severe remnant polarization (Pr) degradation of PZT capacitor with PE-TEOS. This large stress effect of PE-TEOS was confirmed by measuring d-spacing values of (111) PZT films with XRD technique. These results suggest that the low ILD deposition temperature is a key parameter for achieving an ILD integration with a minimal Pr degradation. === Ph. D.