Thermal and mechanical analysis of interconnect structures in 3D stacked packages

Thermal and mechanical analysis of interconnect structures in 3D stacked packages

Physical scaling limits of microelectronic devices and the need to improve electrical performance have driven significant research and development into 3D architecture. The development of die stacks in first level packaging is one of the more viable short-term options for improved performance. Place...

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Bibliographic Details
Main Author: Wakil, Jamil Abdul
Format: Others
Language:English
Published: 2011
Subjects:
3D stacked packages
Thermal
Mechanical
Modeling
TSV
Transient
Interfacial resistance
Through-silicon vias
Online Access:http://hdl.handle.net/2152/ETD-UT-2010-05-993

Internet

http://hdl.handle.net/2152/ETD-UT-2010-05-993

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