Designs and methodologies for post-silicon timing characterization
Timing analysis is a key sign-off step in the design of today's chips, but technology scaling introduces many sources of variability and uncertainty that are difficult to model and predict. The result of these uncertainties is a degradation in our ability to predict the performance of fabricate...
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| Format: | Others |
| Language: | en_US |
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2013
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| Online Access: | http://hdl.handle.net/2152/21718 |