Improving timing verification and delay testing methodologies for IC designs

Improving timing verification and delay testing methodologies for IC designs

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Bibliographic Details
Main Author: Zeng, Jing
Format: Others
Language:English
Published: 2008
Subjects:
Integrated circuits > Design and construction > Methodology
Integrated circuits > Testing
Integrated circuits > Verification
Online Access:http://hdl.handle.net/2152/1809

Internet

http://hdl.handle.net/2152/1809

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