Process Variation Aware DRAM (Dynamic Random Access Memory) Design Using Block-Based Adaptive Body Biasing Algorithm

Large dense structures like DRAMs (Dynamic Random Access Memory) are particularly susceptible to process variation, which can lead to variable latencies in different memory arrays. However, very little work exists on variation studies in DRAMs. This is due to the fact that DRAMs were traditionally p...

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Bibliographic Details
Main Author: Desai, Satyajit
Format: Others
Published: DigitalCommons@USU 2012
Subjects:
Online Access:https://digitalcommons.usu.edu/etd/1419
https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=2388&context=etd