Memory Architecture Template for Fast Block Matching Algorithms on Field Programmable Gate Arrays
Fast Block Matching (FBM) algorithms for video compression are well suited for acceleration using parallel data-path architectures on Field Programmable Gate Arrays (FPGAs). However, designing an efficient on-chip memory subsystem to provide the required throughput to this parallel data-path archite...
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| Format: | Others |
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DigitalCommons@USU
2009
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| Online Access: | https://digitalcommons.usu.edu/etd/495 https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=1491&context=etd |