Force-Directed Instruction Scheduling for Low Power
The increasing need for low-power computing devices has led to the efforts to optimize power in all the components of a system. It is possible to achieve significant power optimization at the software level through instruction reordering during the compilation phase. In this thesis, we have designed...
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| Format: | Others |
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Scholar Commons
2003
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| Online Access: | https://scholarcommons.usf.edu/etd/1357 https://scholarcommons.usf.edu/cgi/viewcontent.cgi?article=2356&context=etd |