Utilitarian Approaches for Multi-Metric Optimization in VLSI Circuit Design and Spatial Clustering
In the field of VLSI circuit optimization, the scaling of semiconductor devices has led to the miniaturization of the feature sizes resulting in a significant increase in the integration density and size of the circuits. At the nanometer level, due to the effects of manufacturing process variations,...
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Scholar Commons
2008
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| Online Access: | https://scholarcommons.usf.edu/etd/273 https://scholarcommons.usf.edu/cgi/viewcontent.cgi?article=1272&context=etd |