Design and Acceleration of Linear Integer System Solver on Programmable SoC

A simple solver for linear integer systems is designed and accelerated on aCycloneV SoC chip that contains Cortex-A based MCU, programmable FPGA, andinter-connect bridges. The solver is designed based on the Gaussian Elimination method, where a system coefficient matric is converted to a Row-Echelo...

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Bibliographic Details
Main Author: Gandhi, Jagadeep Ram
Format: Others
Language:English
Published: Uppsala universitet, Institutionen för informationsteknologi 2019
Subjects:
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-390022