Hiding and Reducing Memory Latency : Energy-Efficient Pipeline and Memory System Techniques
Memory accesses in modern processors are both far slower and vastly more energy-expensive than the actual computations. To improve performance, processors spend a significant amount of energy and resources trying to hide and reduce the memory latency. To hide the latency, processors use out-order-or...
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| Format: | Doctoral Thesis |
| Language: | English |
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Uppsala universitet, Avdelningen för datorteknik
2016
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-306369 http://nbn-resolving.de/urn:isbn:978-91-554-9744-6 |