Efficient methods for application performance analysis
To reduce latency and increase bandwidth to memory, modern microprocessors are designed with deep memory hierarchies including several levels of caches. For such microprocessors, the service time for fetching data from off-chip memory is about two orders of magnitude longer than fetching data from t...
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| Format: | Others |
| Language: | English |
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Uppsala universitet, Avdelningen för datorteknik
2011
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-227616 |