A Self-compensated, Bandwidth Tracking Semi-digital PLL Design in 65nm CMOS Technol-ogy

A Self-compensated, Bandwidth Tracking Semi-digital PLL Design in 65nm CMOS Technol-ogy

In a conventional charge-pump based PLL design, the loop parameters such as the band-width, jitter performance, charge-pump current, pull-in range among others govern the ar-chitecture and implementation details of the PLL. Different loop parameter specificationschange with a change in the reference f...

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Bibliographic Details
Main Author: Yogesh, Mitesh
Format: Others
Language:English
Published: Linköpings universitet, Elektroniksystem 2012
Subjects:
PLL
semi-digital
Bandwidth tracking
Adaptive bandwidth
Compensation
PVT
Self-Bias
charge-pump
VCO
65nm
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-85143

Internet

http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-85143

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