Konstruktion av förstärkare och insamplingssteg till en PSAADC i 0.25 um CMOS
The aim and goal of this work has been to design and implement a voltage reference network for a 12-bit PSAADC, Parallell Successive Analog to Digital Converter. A chip containing the design has been sent away for fabrication. Because of the long processing time, no measurement data are presented. T...
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| Format: | Others |
| Language: | Swedish |
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Linköpings universitet, Institutionen för systemteknik
2002
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1132 |