An On-Chip Memory for Testing of High-Speed Mixed-Signal Circuits

An On-Chip Memory for Testing of High-Speed Mixed-Signal Circuits

Mixed-signal processing systems especially data converters can be reliably tested at high frequencies using on-chip testing schemes based on memory. In this thesis, an on-chip testing strategy based on shift registers/memory (2 k bits) has been proposed for digital-to-analog converters (DACs) operat...

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Bibliographic Details
Main Author: Omar, Omar Jaber
Format: Others
Language:English
Published: Linköpings universitet, Elektroniska komponenter 2013
Subjects:
On-chip memory
Testing of high-speed MSPS circuits
Shift register
Clock divider
Clock multiplexing
Serializer
Multiplexer
Synchronous sequential circuits
Timing and clocking
CMOS
DFF
TFF
SIPO
PISO.
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-103800

Internet

http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-103800

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