Time to Digital Converter used in ALL digital PLL
This thesis proposes and demonstrates Time to Digital Converters (TDC) with high resolution realized in 65-nm digital CMOS. It is used as a phase detector in all digital PLL working with 5GHz DCO and 20MHz reference input for radio transmitters. Two kinds of high resolution TDC are designed on schem...
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| Format: | Others |
| Language: | English |
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KTH, Skolan för informations- och kommunikationsteknik (ICT)
2011
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-91170 |