Architecture-aware Task-scheduling : A thermal approach
Current task-centric many-core schedulers share a “naive” view of processor architecture; a view that does not care about its thermal, architectural or power consuming properties. Future processor will be more heterogeneous than what we see today, and following Moore’s law of transistor doubling, we...
| Main Authors: | , |
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| Format: | Others |
| Language: | English |
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KTH, Programvaru- och datorsystem, SCS
2011
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| Subjects: | |
| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-89634 |