Validation of Power Dissipation of SerDes IPs
Post-Silicon validation of a designed ASIC is an essential step in the product development process. During the validation process, all specifications of the ASICs have to be controlled in a lab environment. Serializer/Deserialiser(SerDes) blocks in an ASIC are used to perform high-speed serial data...
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| Format: | Others |
| Language: | English |
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KTH, Skolan för elektroteknik och datavetenskap (EECS)
2021
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-291216 |