A novel programmable logic array structure with low energy consumption
As modern integrated circuit design pushes further into the deep submicron era, the pseudo-random design structures become more and more difficult to fabricate and result in a yield reduction. To deal with process limitations due to photolithographic resolution, standard cell ASICs (SC-ASIC) may eve...
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| Format: | Others |
| Language: | English |
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University of British Columbia
2009
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| Online Access: | http://hdl.handle.net/2429/7450 |