Structured logic arrays as an alternative to standard cell ASIC
In the deep submicron (DSM) era, design rules have become increasingly more stringent and have favoured the more structured architectures. The design methods using standard cell ASICs (SC-ASIC) produce randomly placed gates and interconnects. Beside reduced yield, they also suffer from high testi...
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| Language: | English |
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2010
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| Online Access: | http://hdl.handle.net/2429/17571 |