Design of Clock-Deskewing Circuit with Fast-Locking Capability

碩士 === 國立雲林科技大學 === 電機工程系 === 107

Bibliographic Details
Main Authors: WANG, SZU-PU, 王思璞
Other Authors: HWANG, CHORNG-SII
Format: Others
Language:zh-TW
Published: 2019
Online Access:http://ndltd.ncl.edu.tw/handle/tsz5z2