The Evaluation of Underfill for Small Die Flip Chip Packaging
碩士 === 國立高雄大學 === 電機工程學系-電子構裝整合技術產業碩士專班 === 107 === This thesis is focus on the evaluation of underfill process for chip size package (CSP) due to its small package size to cause bleeding and creeping which can generate failure modes of voids and corrosion to the bonding and also disqualified by opt...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/handle/8c5sm7 |