Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router

碩士 === 國立臺灣科技大學 === 資訊工程系 === 107 === As the rapidly growing demand for system-level integration, package substrates has become one of the most important carriers in semiconductor industry. Fine pitch ball grid array (FBGA) packaging is a widely used technology thanks to its relative cost-effectiven...

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Main Authors: Jun-Sheng Wu, 吳峻陞
Other Authors: Yi-Yu Liu
Format: Others
Language:en_US
Published: 2019
Online Access:http://ndltd.ncl.edu.tw/handle/6npe46
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spelling ndltd-TW-107NTUS53920472019-10-23T05:46:03Z http://ndltd.ncl.edu.tw/handle/6npe46 Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router 基於整數線性規劃之球柵陣列基板繞線器最佳化策略 Jun-Sheng Wu 吳峻陞 碩士 國立臺灣科技大學 資訊工程系 107 As the rapidly growing demand for system-level integration, package substrates has become one of the most important carriers in semiconductor industry. Fine pitch ball grid array (FBGA) packaging is a widely used technology thanks to its relative cost-effectiveness compared to other advanced packaging technologies. In the FBGA substrate routing, there is a mismatched via dimension problem owing to the mechanical processes. Such mismatched issue increases the design complexity in a tightly resource-constrained substrate design. Due to various design requirements and the mismatched via dimension in FBGA substrate designs, most substrate interconnects are still customized by experienced layout engineers. However, manual substrate routing is a time consuming and error-prone task. In this thesis, we present a three-stage framework for an integer linear programming (ILP) based substrate router. The proposed framework includes the via prediction stage, the global optimization stage, and the rip-up and reroute stage. Experimental results reveal that the proposed framework achieves almost the same routing quality with average 295X speedup on 6 industrial designs. Yi-Yu Liu 劉一宇 2019 學位論文 ; thesis 39 en_US
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description 碩士 === 國立臺灣科技大學 === 資訊工程系 === 107 === As the rapidly growing demand for system-level integration, package substrates has become one of the most important carriers in semiconductor industry. Fine pitch ball grid array (FBGA) packaging is a widely used technology thanks to its relative cost-effectiveness compared to other advanced packaging technologies. In the FBGA substrate routing, there is a mismatched via dimension problem owing to the mechanical processes. Such mismatched issue increases the design complexity in a tightly resource-constrained substrate design. Due to various design requirements and the mismatched via dimension in FBGA substrate designs, most substrate interconnects are still customized by experienced layout engineers. However, manual substrate routing is a time consuming and error-prone task. In this thesis, we present a three-stage framework for an integer linear programming (ILP) based substrate router. The proposed framework includes the via prediction stage, the global optimization stage, and the rip-up and reroute stage. Experimental results reveal that the proposed framework achieves almost the same routing quality with average 295X speedup on 6 industrial designs.
author2 Yi-Yu Liu
author_facet Yi-Yu Liu
Jun-Sheng Wu
吳峻陞
author Jun-Sheng Wu
吳峻陞
spellingShingle Jun-Sheng Wu
吳峻陞
Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router
author_sort Jun-Sheng Wu
title Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router
title_short Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router
title_full Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router
title_fullStr Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router
title_full_unstemmed Optimization Strategies for Integer Linear Programming Based Ball Grid Array Substrate Router
title_sort optimization strategies for integer linear programming based ball grid array substrate router
publishDate 2019
url http://ndltd.ncl.edu.tw/handle/6npe46
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