Summary: | 碩士 === 國立臺灣師範大學 === 機電工程學系 === 107 === The disturbance observer (DOB) is useful to a control system. When a system is of high-order and subject to periodic disturbances, The DOB is unable to effectively attenuate such disturbances with a finite-bandwidth filter. Thus it becomes a tradeoff problem between noise rejection and disturbance attenuation. The conventional infinite-order disturbance observer (IFDOB) has been proposed to suppress a periodic disturbance. A modification to the IFDOB was also proposed to enhance the low-frequency compensation. Moreover, an integral disturbance observer (IDOB) and an DC-IDOB were presented to simplify DOB’s implementation. This thesis presents an IF-IDOB scheme that combined the advantages of the IDOB and the repetitive control in order to provide enhanced estimation of periodic disturbances.
The experimentation is carried out using TSM320C6713 DSP and a daughter board, including FPGA, DAC, and ADC. The digital circuit of FPGA is designed by the VHSIC very high-speed hardware description languages to implement data acquisition and storage. The code composer studio developed by Texas Instruments is an effective tool for compiling C/C++ for the control algorithm. The sampling rate of DSP is fixed to 11kHz and achieves a real-time control system.
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