| Summary: | 碩士 === 國立東華大學 === 電機工程學系 === 107 === In this paper ,we simulate Simulation of gate overlap/underlap and source doping gradient of nanowire Tunnel Field-Effect Transistors.
First, we simulate different gate-source overlap/underlap structures in a fixed source concentration gradient and observe their I-V characteristics.
Next, we simulated five different SDGs for each gate-source overlap/underlap structure and observed their device characteristics.
The simulation results show that gate-source overlap structure has better device characteristics than gate-source underlap structure, but the device characteristics do not significantly improve with the increase of the overlap length.
On the other hand, the SDG has Hardly affected on the device characteristics in the gate-source overlap structure, and the larger the SDG in the gate-source underlap structure, the better the device characteristics.
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